News: 2026-02-06
February 06, 2026 · Generated 08:35 AM PT
Here is the Technical Intelligence Report for 2026-02-06.
Executive Summary
- Compiler Infrastructure: AMD engineers have introduced a new GPU target, GFX1170, to the LLVM codebase. Despite belonging to the GFX11 (RDNA 3) family, it is explicitly labeled as “RDNA 4m”, suggesting a branding shift for upcoming APUs/SoCs.
- AI & ISA Updates: The GFX1170 target includes support for FP8 and BF8 conversion instructions, indicating a focus on low-power AI inference for this specific APU class.
- Firmware & Security: 3mdeb presented progress on AMD openSIL (Silicon Initialization) at FOSDEM, demonstrating successful booting of EPYC 9005 “Turin” processors on Gigabyte hardware using open-source firmware, targeting full SEV-SNP support.
- Community: Visual customizations for Sapphire Pulse cards remain a topic of interest within the enthusiast community.
🤖 ROCm Updates & Software
[2026-02-06] AMD Introduces New GPU Target To AMDGPU LLVM: GFX1170 “RDNA 4m”
Source: Phoronix
Key takeaway relevant to AMD:
- Developers should prepare for a new APU target (GFX1170) that bridges RDNA 3 architecture with RDNA 4 marketing/features.
- The inclusion of FP8/BF8 support in an APU target signals enhanced edge-AI capabilities in upcoming mobile or embedded silicon.
Summary:
- AMD compiler engineers pushed the initial enablement for a new target, GFX1170, into the LLVM Git repository.
- While technically part of the GFX11 (RDNA 3/3.5) family, the target is explicitly named “RDNA 4m”.
- This target is confirmed to be for an APU/SoC, distinct from the upcoming discrete RDNA 4 (GFX12) GPUs.
Details:
- Architecture Hybridization:
- The target falls under the GFX11 series (historically RDNA 3).
- It is distinct from the GFX1150/GFX115x series found in “Strix Point” and “Strix Halo” (RDNA 3.5).
- It lacks the full instruction set architecture (ISA) features of the GFX12 (true RDNA 4) series.
- ISA Additions:
- Adds
SALUFloatInsts(Scalar ALU Float Instructions). - Adds
DPPSrc1SGPR(Data Parallel Primitives Source 1 Scalar GPR). - AI Optimization: A merge request was located adding new FP8/BF8 (8-bit Floating Point) conversion instructions, crucial for reduced-precision AI inference.
- Adds
- Implications: The “RDNA 4m” naming convention despite being GFX11 silicon suggests a marketing strategy to align refreshed RDNA 3 IP with the RDNA 4 generation, likely for lower-end or mobile-specific SKUs.
[2026-02-06] 3mdeb Talks Up AMD openSIL & Open-Source Firmware Efforts For Confidential Compute
Source: Phoronix
Key takeaway relevant to AMD:
- Enterprises utilizing AMD EPYC for Confidential Computing (SEV-SNP) are gaining viable open-source firmware alternatives to proprietary UEFI/AGESA.
- AMD’s openSIL initiative is successfully booting current-gen hardware (Zen 5), validating the roadmap to replace AGESA by Zen 6.
Summary:
- Firmware consulting firm 3mdeb presented at FOSDEM regarding open-source firmware for AMD confidential compute infrastructure.
- The talk focused on openSIL (Open-Source Silicon Initialization), AMD’s replacement for the binary-blob AGESA.
- Proof-of-concept implementations are currently functional for Zen 4 and Zen 5 platforms.
Details:
- Hardware Support:
- 3mdeb is adapting the GIGABYTE MZ33-AR1 motherboard (Retail board, not an AMD reference design).
- The board supports AMD EPYC 9005 “Turin” processors.
- Technical Milestones:
- Successfully booting via Coreboot and openSIL.
- Work is in progress for OpenBMC support on the same board.
- Goal: Full support for booting SEV-SNP (Secure Encrypted Virtualization-Secure Nested Paging) guests using entirely open-source firmware.
- Upcoming work: Implementing SEV-TIO (Trusted I/O) support specific to EPYC Turin.
- Roadmap: Coreboot support for the Gigabyte board is expected to be upstreamed in H1 2026.
💬 Reddit & Community
[2026-02-06] Sapphire Pulse Custom Back plate, Kasane Teto Edition
Source: Reddit
Key takeaway relevant to AMD:
- Indicates active community engagement in hardware aesthetic customization for AMD AIB partner cards (Sapphire).
Summary:
- A user posted about a custom backplate modification for a Sapphire Pulse GPU.
Details:
- Note: Full technical content was inaccessible due to network restrictions.
- Based on the title, the modification features “Kasane Teto” (a Synthesizer V / UTAU character), suggesting a “waifu-style” aesthetic mod popular in PC building sub-communities.
- This pertains to the physical customization of the hardware and does not impact driver or silicon performance.
📈 GitHub Stats
| Category | Repository | Total Stars | 1-Day | 7-Day | 30-Day |
|---|---|---|---|---|---|
| AMD Ecosystem | AMD-AGI/GEAK-agent | 61 | +3 | +3 | |
| AMD Ecosystem | AMD-AGI/Primus | 73 | +1 | +2 | |
| AMD Ecosystem | AMD-AGI/TraceLens | 58 | +1 | +2 | |
| AMD Ecosystem | ROCm/MAD | 31 | 0 | 0 | |
| AMD Ecosystem | ROCm/ROCm | 6,144 | +4 | +14 | |
| Compilers | openxla/xla | 3,970 | +3 | +38 | |
| Compilers | tile-ai/tilelang | 5,068 | +27 | +220 | |
| Compilers | triton-lang/triton | 18,363 | +9 | +64 | |
| Google / JAX | AI-Hypercomputer/JetStream | 404 | 0 | +1 | |
| Google / JAX | AI-Hypercomputer/maxtext | 2,132 | +2 | +17 | |
| Google / JAX | jax-ml/jax | 34,804 | +9 | +54 | |
| HuggingFace | huggingface/transformers | 156,155 | -15 | +210 | |
| Inference Serving | alibaba/rtp-llm | 1,041 | +1 | +4 | |
| Inference Serving | efeslab/Atom | 336 | 0 | +1 | |
| Inference Serving | llm-d/llm-d | 2,453 | +3 | +32 | |
| Inference Serving | sgl-project/sglang | 23,398 | +87 | +406 | |
| Inference Serving | vllm-project/vllm | 69,647 | +77 | +588 | |
| Inference Serving | xdit-project/xDiT | 2,526 | -1 | +10 | |
| NVIDIA | NVIDIA/Megatron-LM | 15,149 | +1 | +71 | |
| NVIDIA | NVIDIA/TransformerEngine | 3,142 | +2 | +17 | |
| NVIDIA | NVIDIA/apex | 8,911 | 0 | +4 | |
| Optimization | deepseek-ai/DeepEP | 8,965 | +3 | +23 | |
| Optimization | deepspeedai/DeepSpeed | 41,551 | +4 | +75 | |
| Optimization | facebookresearch/xformers | 10,326 | +1 | +13 | |
| PyTorch & Meta | meta-pytorch/monarch | 958 | 0 | +5 | |
| PyTorch & Meta | meta-pytorch/torchcomms | 328 | +1 | +5 | |
| PyTorch & Meta | meta-pytorch/torchforge | 613 | +2 | +9 | |
| PyTorch & Meta | pytorch/FBGEMM | 1,526 | +1 | +5 | |
| PyTorch & Meta | pytorch/ao | 2,667 | -1 | +15 | |
| PyTorch & Meta | pytorch/audio | 2,822 | 0 | +3 | |
| PyTorch & Meta | pytorch/pytorch | 97,200 | +24 | +137 | |
| PyTorch & Meta | pytorch/torchtitan | 5,041 | +3 | +21 | |
| PyTorch & Meta | pytorch/vision | 17,497 | 0 | +11 | |
| RL & Post-Training | THUDM/slime | 3,697 | +21 | +103 | |
| RL & Post-Training | radixark/miles | 845 | +8 | +43 | |
| RL & Post-Training | volcengine/verl | 19,035 | +30 | +195 |